To meet a requirement for high density and miniaturization of integrated circuits, chip stacking has become a development trend of integrated circuits. In the prior art, a chip stacking manner is generally placing a chip horizontally, and stacking one or more chips on the chip vertically upward layer by layer. The chips may be connected to each other by means of laser drilling, that is, holes are formed in the stacked chips using a laser, and then the chips are connected to each other by electroplating.
For a chip stacking packaging structure in the prior art, since chips are closely stacked horizontally, such a stacking manner leads to low heat dissipation performance of the chips. Heat generated by the chips can only be conducted to the outside through metal wiring and a material of chips themselves, resulting in a low heat conduction efficiency. In addition, since a high-power chip and a low-power chip are stacked together, the temperature of the low-power chip increases under influence of the high-power chip, thereby affecting performance of the chip.